INFINEON
Infineon Technologies Traveo T2G Series Part #CYT2B | MCU | DEX
Infineon Technologies Traveo T2G Series Part #CYT2B | MCU | DEX
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Infineon Technologies Traveo T2G Series Part #CYT2B
Infineon Technologies Traveo II 32-bit Arm Automotive MCUs offer cutting-edge performance, safety, and security features for automotive body electronics applications. These MCUs are built using single Arm Cortex-M4F and dual Cortex-M7F, and with enhanced performance of 1500DMIPS in Traveo II family. The Traveo automotive MCUs offer scalability across memory size and pin count. The IP compatibility enables customers to design and develop systems with a single-platform MCU solution. These MCUs possess advanced security features like Hardware Security Module (HSM), dedicated Cortex-M0+ for secure processing, and embedded flash in dual bank mode for Firmware Over-the-Air (FOTA) requirements.
The Traveo II MCUs feature six power modes that enable ECUs to minimize overall power consumption. These MCUs feature an optimized software platform that is available for Infineon AUTOSAR Microcontroller Abstraction Layer (MCAL), self-test libraries, Flash EEPROM emulation, and security low-level drivers with third-party firmware. The automotive MCUs are designed for the future of cars. The Traveo II family also has state-of-the-art safety features, including ECC for memories, power supply voltage and clock monitors, watchdogs, and self-test libraries. Traveo II family supports six power modes: Active, Sleep, Low-Power Active, Low-Power Sleep, DeepSleep, and Hibernate (5uA typical). These microcontrollers also support cyclic wake-up from DeepSleep to optimize power consumption.
Features:
- 32-bit MCU Core Systems
- 160-MHz Arm Cortex-M4 Single
- 4MB Flash
- 128KB Work Flash
- 512KB SRAM
- Cortex-M0+ for Crypto
- Interfaces
- Up to 8-channel CAN FD
- Up to 8-channel SCB
- 12-channel LIN-UART
- 4-channel CXPI controller
- AD Converter
- Up to 64-channel
- 12-bit with 3x successive approximation ADC (SAR ADC) units
- Timers
- Up to 12-channel motor control
- 63-channel 16-bit timer/counter/PWM (TCPWM)
- 8-channel 32-bit TCPWM
- Event Generation Timer
- Packages
- 64-pin LQFP
- 80-pin LQFP
- 100-pin LQFP
- 144-pin LQFP
- 176-pin LQF
- Security
- Embedded eSHE (Enhanced Secure Hardware Extension)
- HSM (Hardware Security Module)
- Hardware-accelerated cryptography engine (on/off option)
- One Time Programmable Fuses (OTP) to manage device lifecycle
- Memory Protection Unit (MPU), Shared Memory Protection Unit (SMPU), and Peripheral Protection Unit (PPU) for memory and peripheral protection
- Support JTAG security for secure debugging
- Safety
- ECC for memory
- Monitors for power supply voltage and clock
- Watchdogs
- Self-test libraries
IFN:CYT2B
CYT2B
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