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BROADCOM CORP

Broadcom Ethernet Integrated Circuit - IC - part #BCM53134OIFBG

Broadcom Ethernet Integrated Circuit - IC - part #BCM53134OIFBG

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Broadcom Ethernet Integrated Circuit - IC - part #BCM53134OIFBG

General Description The Broadcom® BCM53134O is an ultra-low-power, highly integrated, cost-effective smart Gigabit switch. The switch design is based on the field-proven, industry-leading ROBO architecture. This device combines all the functions of a high-speed switch system including packet buffers, PHY transceivers, media access controllers (MACs), address management, port-based rate control, and a nonblocking switch fabric into a single 28 nm CMOS device. Designed to be fully compliant with the IEEE 802.3 and IEEE 802.3x specifications, including the MAC-control PAUSE frame, the BCM53134O provides compatibility with all industry-standard Ethernet, Fast Ethernet, and Gigabit Ethernet (GbE) devices.

The BCM53134O has a rich feature set suitable for not only standard GbE connectivity for broadband home gateways, desktop, and laptop PCs, but also for next-generation gaming consoles, set-top boxes, networked DVD players, and home theater receivers. It is also specifically designed for next generation SOHO/SMB routers and gateways. The BCM53134O contains four full-duplex 10/100/ 1000BASE-T Ethernet transceivers. In addition, the BCM53134O has two PHY-less interfaces for the CPU or a router chip, providing flexible 10/100/1000 Mb/s connectivity. One RGMII interface can be connected to a CPU entity and configured as an IMP (In-Band Management port).

The second interface port is available in an SGMII interface supporting rates of up to 2.5 Gb/s (2.5 Gb/s is for 2500BASE-X only) that can be connected to optical modules or any other device with an SGMII interface. The BCM53134O provides 70+ on-chip MIB counters to collect receive and transmit statistics for each port.

Features

 Six 10/100/1000 media access controllers  Four-port 10/100/1000 transceivers for TX  One RGMII interface for an IMP for connection to a CPU/management entity without PHY  One SGMII interface supports 1G/2.5 Gb/s (2.5 Gb/s is for 2500BASE-X only)  Supports 2500BASE-X,1000BASE-X, and 100BASEFX  IEEE 802.1p, MAC Port, TOS, and DiffServ QoS for six queues, plus two time-sensitive queues  Port-based VLAN  IEEE 802.1Q-based VLAN with 4K entries  MAC-based trunking with automatic link failover  Port-based rate control  Port mirroring (Ingress/Egress)  Supports IPv4 and IPv6  Priority modification on egress  BroadSync® HD for IEEE 802.1AS support  Timestamp tagging at MAC interface  Time-aware egress scheduler  DOS attack prevention  IGMP Snooping, MLD snooping support  Spanning tree support (multiple spanning trees–up to eight)  Embedded CPU (8051) processor for cable diagnostics  CableChecker™ with unmanaged mode support  Double tagging/QinQ  IEEE 802.az Energy Efficient Ethernet (EEE) support  IEEE 802.3x programmable per-port flow control and back pressure, with IEEE 802.1X support for secure user authentication  EEPROM, MDC/MDIO, and SPI Interface.  Serial Flash Interface for accessing embedded CPU (8051)  4K entry MAC address table with automatic learning and aging  128 KB packet buffer (1 KB = 1024 bytes)  128 multicast group support

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