Micron Technology DRAM , Part #: MT48LC2M32B2B5-6A IT:J TR | Dynamic random access memory | DEX

Micron Technology DRAM SDRAM, Part #: MT48LC2M32B2B5-6A IT:J TR features: • PC100-compliant • Fully synchronous; all signals registered on positive edge of system clock • Internal pipelined operation; column address can be changed every clock cycle • Internal banks for hiding row access/precharge • Programmable burst lengths: 1, 2, 4, 8, or full page • Auto precharge, includes concurrent auto precharge and auto refresh modes • Self refresh mode (not available on AT devices) • Auto refresh – 64ms, 4096-cycle refresh (commercial and industrial) – 16ms, 4096-cycle refresh (automotive) • LVTTL-compatible inputs and outputs • Single 3.3V ±0.3V power supply • Supports CAS latency (CL) of 1, 2, and 3

MIL:MT48LC2M32B2B5-6A IT J TR

MT48LC2M32B2B5-6A IT:J TR