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XILINX INC.

Xilinx Field Programmable Gate Array - FPGA - part # XQ6SLX75T-2FG484Q

Xilinx Field Programmable Gate Array - FPGA - part # XQ6SLX75T-2FG484Q

Regular price $1,188.00 USD
Regular price $1,188.00 USD Sale price $1,188.00 USD
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The Defense-Grade SpartanĀ®-6Q family provides a secure foundation for information assurance and anti-tamper designs that require low
power and low cost for Aerospace and Defense applications. The Spartan-6Q family is the third generation of secure product offered for
high-level cryptography and tamper proofing approved by government agencies. Built on a mature 45 nm low-power copper process
technology that delivers the optimal balance of cost, power, and performance, the Spartan-6Q family offers a more efficient, dual-register
6-input look-up table (LUT) logic and a rich selection of built-in system-level blocks. These include 18 Kb (2 x 9 Kb) block RAMs, second
generation DSP48A1 slices, SDRAM memory controllers, enhanced mixed-mode clock management blocks, SelectIOā„¢ technology,
power-optimized high-speed serial transceiver blocks, PCI ExpressĀ® compatible Endpoint blocks, advanced system-level power
management modes, auto-detect configuration options, and enhanced IP security with AES and Device DNA protection. These features
provide a low-cost programmable alternative to custom ASIC products with unprecedented ease of use. Spartan-6Q FPGAs offer the best
possible solution for defense related applications where SWaP-C reduction is paramount with absolute security and ruggedized
environment operation.

Features
ā€¢ Spartan-6Q Family:
ā€¢ Spartan-6Q LX FPGA: Logic optimized
ā€¢ Spartan-6Q LXT FPGA: High-speed serial connectivity
ā€¢ Designed for low cost
ā€¢ Multiple efficient integrated blocks
ā€¢ Optimized selection of I/O standards
ā€¢ Staggered pads
ā€¢ High-volume plastic wire-bonded packages
ā€¢ Low static and dynamic power
ā€¢ 45 nm process optimized for cost and low power
ā€¢ Hibernate power-down mode for zero power
ā€¢ Suspend mode maintains state and configuration with
multi-pin wake-up, control enhancement
ā€¢ Lower-power 1.0V core voltage (LX FPGAs, -1L only)
ā€¢ High performance 1.2V core voltage (LX and LXT
FPGAs, -2 and -3 speed grades)
ā€¢ Multi-voltage, multi-standard SelectIOā„¢ interface banks
ā€¢ Up to 1,080 Mb/s data transfer rate per differential I/O
ā€¢ Selectable output drive, up to 24 mA per pin
ā€¢ 3.3V to 1.2V I/O standards and protocols
ā€¢ Low-cost HSTL and SSTL memory interfaces
ā€¢ Hot swap compliance
ā€¢ Adjustable I/O slew rates to improve signal integrity
ā€¢ High-speed GTP serial transceivers in the LXT FPGAs
ā€¢ Up to 3.2 Gb/s
ā€¢ High-speed interfaces including: Serial ATA, Aurora,
1G Ethernet, PCI Express, OBSAI, CPRI, EPON,
GPON, DisplayPort, and XAUI
ā€¢ Integrated Endpoint block for PCI Express designs (LXT)
ā€¢ Low-cost PCIĀ® technology support compatible with the
33 MHz, 32- and 64-bit specification.
ā€¢ Efficient DSP48A1 slices
ā€¢ High-performance arithmetic and signal processing
ā€¢ Fast 18 x 18 multiplier and 48-bit accumulator
ā€¢ Pipelining and cascading capability
ā€¢ Pre-adder to assist filter applications
ā€¢ Integrated Memory Controller blocks
ā€¢ DDR, DDR2, DDR3, and LPDDR support
ā€¢ Data rates up to 800 Mb/s (12.8 Gb/s peak bandwidth)
ā€¢ Multi-port bus structure with independent FIFO to reduce
design timing issues
ā€¢ Abundant logic resources with increased logic capacity
ā€¢ Optional shift register or distributed RAM support
ā€¢ Efficient 6-input LUTs improve performance and
minimize power
ā€¢ LUT with dual flip-flops for pipeline centric applications
ā€¢ Block RAM with a wide range of granularity
ā€¢ Fast block RAM with byte write enable
ā€¢ 18 Kb blocks that can be optionally programmed as two
independent 9 Kb block RAMs
ā€¢ Clock Management Tile (CMT) for enhanced performance
ā€¢ Low noise, flexible clocking
ā€¢ Digital Clock Managers (DCMs) eliminate clock skew
and duty cycle distortion
ā€¢ Phase-Locked Loops (PLLs) for low-jitter clocking
ā€¢ Frequency synthesis with simultaneous multiplication,
division, and phase shifting
ā€¢ Sixteen low-skew global clock networks
ā€¢ Simplified configuration, supports low-cost standards
ā€¢ 2-pin auto-detect configuration
ā€¢ Broad third-party SPI (up to x4) and NOR flash support
ā€¢ Feature rich Xilinx Platform Flash with JTAG
ā€¢ MultiBoot support for remote upgrade with multiple
bitstreams, using watchdog protection
ā€¢ Ultimate security
ā€¢ Information assurance support
ā€¢ Anti-tamper support
ā€¢ Unique Device DNA identifier for design authentication
ā€¢ AES bitstream encryption
ā€¢ Faster embedded processing with enhanced, low cost,
MicroBlazeā„¢ soft processor
ā€¢ Industry-leading IP and reference designs

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XLX:XQ6SLX75T-2FG484Q

XQ6SLX75T-2FG484Q

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